final before review

Author: frihetselsker

embassy-nxp/src/lib.rs

@@ -23,7 +23,7 @@ mod time_driver;
 mod chip;
 
 #[cfg(feature = "lpc55-core0")]
-pub use chip::interrupt; 
+pub use chip::interrupt;
 #[cfg(feature = "unstable-pac")]
 pub use chip::pac;
 #[cfg(not(feature = "unstable-pac"))]

embassy-nxp/src/usart/lpc55.rs

@@ -187,7 +187,7 @@ impl<'d> UsartTx<'d, Blocking> {
 impl<'d> UsartTx<'d, Async> {
     /// Write to UART TX from the provided buffer using DMA.
     pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> {
-        // Channel can be unwrapped because UsartTx::new() takes Some() of DMA channel as an argument.
+        // Unwrap() can be used because UsartTx::new() in Async mode always sets it to Some
         let ch = self.tx_dma.as_mut().unwrap().reborrow();
         let transfer = unsafe {
             // Enable to pace DMA transfers.
@@ -337,7 +337,7 @@ impl<'d> UsartRx<'d, Async> {
         // Start a DMA transfer. If errors have happened in the interim some error
         // interrupt flags will have been raised, and those will be picked up immediately
         // by the interrupt handler.
-        // Channel can be unwrapped because UsartRx::new() takes Some() of DMA channel as an argument.
+        // Unwrap() can be used because UsartTx::new() in Async mode always sets it to Some
         let ch = self.rx_dma.as_mut().unwrap().reborrow();
 
         self.info.usart_reg.intenset().write(|w| {