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| 1 | +#ifndef FAS_ARCH_COMMON_ESP32_IDF6_H |
| 2 | +#define FAS_ARCH_COMMON_ESP32_IDF6_H |
| 3 | + |
| 4 | +//========================================================================== |
| 5 | +// |
| 6 | +// ESP32 derivate - the first one |
| 7 | +// |
| 8 | +//========================================================================== |
| 9 | + |
| 10 | +#if CONFIG_IDF_TARGET_ESP32 |
| 11 | +// #define SUPPORT_ESP32_MCPWM_PCNT |
| 12 | +#define SUPPORT_ESP32_RMT |
| 13 | +#define SUPPORT_ESP32_RMT_V2 |
| 14 | +#define SUPPORT_ESP32_PULSE_COUNTER 8 |
| 15 | +#define HAVE_ESP32_RMT |
| 16 | +#define RMT_SIZE 64 |
| 17 | + |
| 18 | +// #define QUEUES_MCPWM_PCNT 6 |
| 19 | +#define QUEUES_MCPWM_PCNT 0 |
| 20 | +#define QUEUES_RMT 8 |
| 21 | + |
| 22 | +#define NEED_RMT_HEADERS |
| 23 | +// #define NEED_MCPWM_HEADERS |
| 24 | +#define NEED_PCNT_HEADERS |
| 25 | + |
| 26 | +//========================================================================== |
| 27 | +// |
| 28 | +// ESP32 derivate - ESP32S2 |
| 29 | +// |
| 30 | +//========================================================================== |
| 31 | +#elif CONFIG_IDF_TARGET_ESP32S2 |
| 32 | +#define SUPPORT_ESP32_RMT |
| 33 | +#define SUPPORT_ESP32_RMT_V2 |
| 34 | +#define SUPPORT_ESP32_PULSE_COUNTER 4 |
| 35 | +#define HAVE_ESP32S3_PULSE_COUNTER |
| 36 | +#define HAVE_ESP32_RMT |
| 37 | +#define RMT_SIZE 64 |
| 38 | +#define QUEUES_MCPWM_PCNT 0 |
| 39 | +#define QUEUES_RMT 4 |
| 40 | +#define NEED_RMT_HEADERS |
| 41 | +#define NEED_PCNT_HEADERS |
| 42 | + |
| 43 | +//========================================================================== |
| 44 | +// |
| 45 | +// ESP32 derivate - ESP32S3 |
| 46 | +// |
| 47 | +//========================================================================== |
| 48 | +#elif CONFIG_IDF_TARGET_ESP32S3 |
| 49 | +// #define SUPPORT_ESP32_MCPWM_PCNT |
| 50 | +#define SUPPORT_ESP32_RMT |
| 51 | +#define SUPPORT_ESP32_RMT_V2 |
| 52 | +#define SUPPORT_ESP32_PULSE_COUNTER 8 |
| 53 | +#define HAVE_ESP32S3_PULSE_COUNTER |
| 54 | +#define HAVE_ESP32_RMT |
| 55 | +#define RMT_SIZE 48 |
| 56 | + |
| 57 | +// #define QUEUES_MCPWM_PCNT 4 |
| 58 | +#define QUEUES_MCPWM_PCNT 0 |
| 59 | +#define QUEUES_RMT 4 |
| 60 | +#define NEED_RMT_HEADERS |
| 61 | +// #define NEED_MCPWM_HEADERS |
| 62 | +#define NEED_PCNT_HEADERS |
| 63 | + |
| 64 | +//========================================================================== |
| 65 | +// |
| 66 | +// ESP32 derivate - ESP32C3 |
| 67 | +// |
| 68 | +//========================================================================== |
| 69 | +#elif CONFIG_IDF_TARGET_ESP32C3 |
| 70 | +#define SUPPORT_ESP32_RMT |
| 71 | +#define SUPPORT_ESP32_RMT_V2 |
| 72 | +#define HAVE_ESP32_RMT |
| 73 | +#define RMT_SIZE 48 |
| 74 | +#define QUEUES_MCPWM_PCNT 0 |
| 75 | +#define QUEUES_RMT 2 |
| 76 | +#define NEED_RMT_HEADERS |
| 77 | + |
| 78 | +//========================================================================== |
| 79 | +// |
| 80 | +// ESP32 derivate - ESP32C6 |
| 81 | +// |
| 82 | +//========================================================================== |
| 83 | +#elif CONFIG_IDF_TARGET_ESP32C6 |
| 84 | +#define SUPPORT_ESP32_RMT |
| 85 | +#define SUPPORT_ESP32_RMT_V2 |
| 86 | +#define SUPPORT_ESP32_PULSE_COUNTER 4 |
| 87 | +#define HAVE_ESP32_RMT |
| 88 | +#define RMT_SIZE 48 |
| 89 | +#define QUEUES_MCPWM_PCNT 0 |
| 90 | +#define QUEUES_RMT 2 |
| 91 | +#define NEED_RMT_HEADERS |
| 92 | +#define NEED_PCNT_HEADERS |
| 93 | + |
| 94 | +//========================================================================== |
| 95 | +// |
| 96 | +// ESP32 derivate - ESP32H2 |
| 97 | +// |
| 98 | +//========================================================================== |
| 99 | +#elif CONFIG_IDF_TARGET_ESP32H2 |
| 100 | +#define SUPPORT_ESP32_RMT |
| 101 | +#define SUPPORT_ESP32_RMT_V2 |
| 102 | +#define SUPPORT_ESP32_PULSE_COUNTER 4 |
| 103 | +#define HAVE_ESP32_RMT |
| 104 | +#define RMT_SIZE 48 |
| 105 | +#define QUEUES_MCPWM_PCNT 0 |
| 106 | +#define QUEUES_RMT 2 |
| 107 | +#define NEED_RMT_HEADERS |
| 108 | +#define NEED_PCNT_HEADERS |
| 109 | + |
| 110 | +//========================================================================== |
| 111 | +// |
| 112 | +// ESP32 derivate - ESP32P4 |
| 113 | +// |
| 114 | +//========================================================================== |
| 115 | +#elif CONFIG_IDF_TARGET_ESP32P4 |
| 116 | +#define SUPPORT_ESP32_RMT |
| 117 | +#define SUPPORT_ESP32_RMT_V2 |
| 118 | +#define SUPPORT_ESP32_PULSE_COUNTER CONFIG_SOC_PCNT_UNITS_PER_GROUP |
| 119 | +#define HAVE_ESP32_RMT |
| 120 | +#define RMT_SIZE CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL |
| 121 | +#define QUEUES_MCPWM_PCNT 0 |
| 122 | +#define QUEUES_RMT CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP |
| 123 | +#define NEED_RMT_HEADERS |
| 124 | +#define NEED_PCNT_HEADERS |
| 125 | + |
| 126 | +//========================================================================== |
| 127 | +// |
| 128 | +// For all unsupported ESP32 derivates |
| 129 | +// |
| 130 | +//========================================================================== |
| 131 | +#else |
| 132 | +#error "Unsupported derivate" |
| 133 | +#endif |
| 134 | + |
| 135 | +// #include <driver/periph_ctrl.h> |
| 136 | +#include <soc/periph_defs.h> |
| 137 | +#include <soc/gpio_sig_map.h> |
| 138 | + |
| 139 | +#ifdef NEED_MCPWM_HEADERS |
| 140 | +#include <driver/mcpwm.h> |
| 141 | +#include <soc/mcpwm_reg.h> |
| 142 | +#include <soc/mcpwm_struct.h> |
| 143 | +#endif |
| 144 | + |
| 145 | +#ifdef NEED_PCNT_HEADERS |
| 146 | +#include <driver/pulse_cnt.h> |
| 147 | +// #include <soc/pcnt_reg.h> |
| 148 | +// #include <soc/pcnt_struct.h> |
| 149 | +#include <soc/pcnt_periph.h> |
| 150 | +#include <driver/gpio.h> |
| 151 | +#include <rom/gpio.h> |
| 152 | +#include <hal/gpio_ll.h> |
| 153 | +#include <esp_rom_gpio.h> |
| 154 | +#endif |
| 155 | + |
| 156 | +#ifdef NEED_RMT_HEADERS |
| 157 | +#include <driver/rmt_tx.h> |
| 158 | +#include <soc/rmt_periph.h> |
| 159 | +#include <soc/rmt_reg.h> |
| 160 | +#include <soc/rmt_struct.h> |
| 161 | + |
| 162 | +#define RMT_CHANNEL_T rmt_channel_handle_t |
| 163 | +// #define FAS_RMT_MEM(channel) ((uint32_t *)RMTMEM.chan[channel].data32) |
| 164 | +// PART_SIZE shall be even. |
| 165 | +#define PART_SIZE (RMT_SIZE >> 1) |
| 166 | +#endif |
| 167 | + |
| 168 | +// in order to avoid spikes, first set the value and then make an output |
| 169 | +// esp32 idf5 does not like this approach => output first, then value |
| 170 | +#define PIN_OUTPUT(pin, value) \ |
| 171 | + { \ |
| 172 | + pinMode(pin, OUTPUT); \ |
| 173 | + digitalWrite(pin, (value)); \ |
| 174 | + } |
| 175 | + |
| 176 | +#endif /* FAS_ARCH_COMMON_ESP32_IDF6_H */ |
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